Workbench Traffic Generators and Analysers

Customers of Sembarc’s Goliath family of IP solutions can benefit from a suite of Telecoms Transport Workbench programs which are used to test the OTN Transponder and OTN Muxponder IP. These programs interface to a hardware simulator running a simulation of the device to be tested.  The workbenches can generate a variety of complex input signals and can analyse the resulting outputs.  Many parameters associated with the test signal can be controlled, including the insertion of faults.

OTN Ports

  • OTN Generator – generates OTN traffic inputs
  • OTN Analyser – analyses OTN traffic outputs
  • OTN Port Rates:
    • OTU2 – 10Gb (32-bit parallel)
    • OTU3 – 40Gb (4 x 32-bit parallel)
    • OTU4 – 100Gb (10 x 32-bit parallel, GMP Mapped)
  • Payload Types
    • Null Clients
    • PRBS-31 Test Signal
    • Ethernet (various mappings available)
    • Multiple Framer Test Signals

Client Ports

  • Client Generator – generates Client traffic inputs
  • Client Analyser – analyses Client traffic outputs
  • Client Port Rates:
    • Null client
    • PRBS-31 Test Signal
    • 1Gb Ethernet
    • 10Gb Ethernet (32-bit parallel, 64/66b Encoded)
    • 40Gb Ethernet
    • 100Gb Ethernet (10 x 32-bit parallel, 64/66b Encoded)
    • Custom variants of standard interfaces

Workbench Features

  • Based on the IEEE Standard 1364-2001 PLI interface
  • Supported on Windows and Linux platforms
  • Comprehensive logging:
    • Logging of frame data
    • Logging of Ethernet packet summaries
    • Logging of errors (generated and detected)
    • Logging of user defined corruption, and errors corrected (FEC tests)
  • Scrambler enable/disable
  • Frequency Offset Control
  • User defined control of overhead values:
    • multiple changes
    • start times and durations
  • User defined stuff patterns
    • Individual patterns for Fixed-stuff, FEC-stuff, and GMP-stuff
  • Word Alignment control across the 32-bit parallel interface
  • Skew control across multiple parallel interfaces
  • Modification of lane alignment markers
  • Trace Strings
  • Frame Error Insertion
    • e.g. – OTU AIS, ODU AIS, ODU OCI, ODU LCK
  • Alarm Detection
    • e.g. – LOF, OOF, OOM, OTU AIS, ODU AIS, ODU OCI, ODU LCK
  • MAC Address Selection
  • FEC selection
  • User controlled frame corruption (as a FEC test feature)
  • Various custom interfaces to support sub-block module device testing